4535 611 98931 iE33 Service Manual Page 94
CSIP Level 1 Theory of Operation: Physical Structure
Signal
Processing
Subsystem
The Signal Processing Subsystem comprises functional blocks that operate on and modify the
received signals after beamforming and before image processing. The functional blocks of the sig-
nal processing subsystem are partitioned over the following modules.
• Dual Signal Conditioning PCB (DSC)
• Signal and Image Processing (SIP) Motherboard
Dual Signal Conditioning PCB (DSC)
• Processes dual real-time streams of information from the front-end including echo, Color,
CPA imaging, Power Motion Imaging, Tissue Doppler Imaging, PW Doppler, CW Doppler,
2D/M-mode, and Color M-mode) before sending the data to the motherboards
• Buffers RF data and passes information to the Yukon ASIC where the front-end sample rate is
decoupled from the DSC clock
• Writes data from each RF bus to the PCI bus for storage in an RF capture buffer (in system
memory)
• Writes RF headers, RF data, or both to the RF capture buffer
• Filters lines for capture using the datatype header
• Yukon ASIC, dual data streams
- RF A/B Bus summed and swapped
- Normalization (applies depth versus gain curves)
- RF multizone fine delay
- RF multizone blend
- Lateral RF interpolation filter
- Synthetic aperture
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