4535 611 98931 iE33 Service Manual Page 96
CSIP Level 1 Theory of Operation: Output Power Monitor Theory
Signal and Image Processing Motherboard (SIP)
• Contains signal and image processing for all imaging modes.
• Scan conversion.
• Contains image (Cineloop) memory.
• Wall filter and gain.
• Connected to the Host Motherboard by the Inter-Platform Link (IPL), a 64-bit PCI-PCI cus-
tom bridge. (IPL handles just data. Control is accomplished via FireWire cable.)
• Sends image data (native images) to Host for graphics overlay.
• Monitors +3.3 Vdc, +5.0 Vdc, ±12.0 Vdc, CPU core voltage, CPU temperature, and the
motherboard ambient temperature.
• Stores images to two hard drives.
Output Power
Monitor
Theory
Output power monitor provides patient safety by ensuring the system is operating within acous-
tic power and intensity (AP&I) limits. It also protects hardware from destructive or unsafe condi-
tions. It consists of AP&I software, which resides on the System CPU; FEC software; pulser
monitors in each Channel Board; and a beamformer monitor.
The output power monitor is designed to detect any single failure in the system, for example, a
faulty power supply, a faulty beamformer, a software failure, a defective transducer or transducer
data files. Mode information, (PRI, voltage, burst, and so forth) sent to the beamformer is also
verified before allowing the beamformer to start. This prevents the system from inadvertently
creating a temporary over-power condition.
The DC output level is monitored for each pulser power supply (on the Channel Boards, on the
NAIM, and within the transducer). Output load current is measured for each pulser supply and
compared to levels expected by the Acoustic Power and Intensity Manager (APIM). The moni-
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