4535 611 98931 iE33 Service Manual Page 90
CSIP Level 1 Theory of Operation: Physical Structure
• Analog signal path D/A conversion and external power amplification.
• 32 receive channels per board connect to the FEC bus, TIM bus, and the clocks.
• Bus interfaces: Sum A, Sum B, TIM, FEP, FEC.
• CW Doppler processing (array current summed and pencil probe)
• CW Pulser waveform generator and pulser for static CW
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