ATM-TRK (Circuit Emulation Service Circuit Pack)
Issue 4 May 2002
10-249 555-233-123
ATM Board Framer Looparound Test (#1260)
Destructive
This test verifies the board’s circuit (Time Division Multiplexing) and packet paths
using an on-board, dummy virtual circuit. Before running the test, you must
■ busyout the ATM-TRK circuit pack (busyout board UUCSS) and
■ switch synchronization (change synchronization) from the ATM-TRK
circuit pack
If the ATM-TRK circuit pack is supplying synchronization, the test aborts.
The test sends a digital counter from one of the tone generators via one of the
TDM bus time slots. The ATM framer interface converts this digital counter to ATM
cells and loops them back internally. The ATM-TRK circuit pack converts the cells
back to a digital counter and sends it to the tone receiver for verification. If the
circuit pack passes the circuit check, the software checks the packet path by
sending a packet from the packet-interface circuit pack to the ATM-TRK circuit
pack via the ATM protocol stack.
22 High-level Path alarm indication signal
23 High-level Path remote defect indicator
24 Loss of Cell Delineation
25 Uncorrectable headers sent by the ATM switch.
26 Too many cells with invalid VPI/VCI combination.
27 The signalling link between the board and the ATM switch is down.
34 AAL5 Excessive retransmission requests -per VC
35 LAPD Excessive retransmission requests - per VC
37 ATM CLP (Cell Loss Priority) Bit - see MO ATM-NTWK
38 ATM Congestion Indicator - see MO ATM-NTWK
39 ATM Cell Underrun - see MO ATM-NTWK
40 ATM Cell Overrun - see MO ATM-NTWK
41 ATM Lost Cells - see MO ATM-NTWK
Table 10-101. Aux Data YY for ATM Board Error Query Test (#1259) — Continued
If YY= Then
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