Maintenance Object Repair Procedures
555-233-123
10-1228 Issue 4 May 2002
Standby Processor Interface Circuit Pack Test
(#423)
This test is run only in a High or Critical Reliability system. This test is run on
Processor Interface circuit packs that are currently in Standby Mode and thus no
active calls are up on these circuit packs. It is very important to periodically test
the Standby Processor Interface circuit packs to ensure their health in case of an
SPE-interchange. This test is run either by system technician demand (test
interface PCS or reset interface PCS) or during scheduled maintenance. The
test resets the circuit pack. The main purpose of this test is to perform a
Checksum Test on the downloadable firmware or to download new Processor
Interface firmware if the reset interface PCS command is used. If the checksum
fails, then the firmware is downloaded again from the tape.
Table 10-459. TEST #423 Standby PI Board Test
Error
Code
Te s t
Result Description/Recommendation
9,10 ABORT Internal system error
1. Retry the command at 1-minute intervals a maximum of 5
times.
1029
1030
2011
2012
2013
2014
2015
2016
2017
2018
2020
2022
2024
2025
2051
ABORT Refer to “STBY-SPE” for a description of these error codes.
1124 ABORT There are currently no enabled Processor Interface links in the
system.
1. Wait and run this test when links are enabled and the PI-SCI
(System Communication Interface) has been started up.
1 FAIL Could not reset the Processor Interface circuit pack.
1. Wait 1 minute, and retry the command.
2. If this test continues to fail, replace TN765 Processor
Interface (PI) circuit pack. Refer to Chapter 6, ‘‘Reliability
Systems: A Maintenance Aid’’ for instructions on how to
replace an SPE complex circuit pack.
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