Packet Bus Fault Isolation and Correction
555-233-123
9-30 Issue 4 May 2002
Procedure 3
Procedure 3 removes and reinserts control carrier circuit packs one at a time. The
Packet Control, Tone-Clock, and Expansion Interface circuit packs are the only
processor complex circuit packs that communicate on the Packet Bus. In addition,
the Memory 1 and EPN Maintenance Board circuit packs are connected to the
Packet Bus in the backplane (while the Memory 2 circuit pack is not). Therefore,
these are the only processor complex circuit packs that are likely to cause a
Packet Bus problem in a stable system. As a result, Procedure 3 should be
performed only on the Packet Control, Memory 1, and EPN Maintenance Board
circuit packs in all systems, and on the Expansion Interface and Tone-Clock circuit
packs in High and Critical Reliability systems.
!
CAUTION:
If the TN771 Standalone mode does NOT indicate Packet Bus faults,
perform Procedure 3 for ONLY the Packet Control, Expansion Interface, and
Tone-Clock circuit packs. Also, problems with the backplane pins need not
be checked for. Determining if the problem is resolved by removing circuit
packs is sufficient.
In a system without High or Critical Reliability, do the following:
1. Power down the control carrier. Refer to the ‘‘Removing Power’’ section in
Chapter 5, ‘‘Routine Maintenance Procedures’’.
2. Remove the suspect circuit pack.
3. As in Procedure 2, determine if the backplane pins in the removed circuit
pack’s slot are bent.
4. If the backplane pins are bent, do the following:
a. Straighten or replace the pins
b. Insert the same circuit pack
5. If the backplane pins are not bent, replace the circuit pack (reinsert the
circuit pack if a replacement is not available).
6. Turn the power back on to reboot the system. Refer to the ‘‘Restoring
Power’’ section in Chapter 5, ‘‘Routine Maintenance Procedures’’.
7. Determine if the Packet Bus fault is still present.
8. If the Packet Bus fault is still present, do the following:
a. If the circuit pack was reinserted in Step 5, replace the circuit pack,
and repeat Procedure 3.
b. If the circuit pack was replaced in Step 5, repeat Procedure 3 for the
next processor complex circuit pack.
9. If the Packet Bus fault does not recur, the procedure is completed.
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