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AudioCodes Mediant 8000 - Configuring the Media Gateway Software; Connecting the Media Gateway to the External Equipment

AudioCodes Mediant 8000
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Version 6.6 517 October 2014
Installation & Operation Manual 38. Configuring the PSTN Subsystem
Figure
38-12: Stand-Alone Clock Synchronization Mode
In Standalone Board Sync clock mode, the clock is derived from the high-level
communication layer protocol of the PSTN interface (OC-3, STM-1, T1 on T3 for TP-
6310 or E1/T1 on TP-8410) or from the internal board's clock reference.
38.8.1.1 Connecting the Media Gateway to the External Equipment
In the Standalone Board Sync clock mode, the clock is derived from the PSTN
interface (OC-3, STM-1, E1, T1 or T3) connected to the Media Gateway board or from
the internal board's clock reference. If you wish to derive the clock from the PSTN
interface, you must simply connect the PSTN interface links/trunks to the Media
Gateway boards. If you wish to use internal board's clock reference, there is no need
to connect the Media Gateway to any external equipment.
38.8.1.2 Configuring the Media Gateway Software
This section describes how to configure the Standalone Board Sync Clock Mode.
To configure the Standalone Board Sync Clock Mode:
1. Click
to access the Media Gateway status screen.
2. In the Navigation pane, select PSTN and then in the configuration pane, click
Clock Settings; the Clock Settings screen is displayed.
3. Configure Timing Mode parameter as StandaloneBoardSync.
4. In the Standalone Board Mode Settings tab, configure the None Mode Clk
Source parameters as follows:
internalthe board synchronizes according to the internal clock reference
pstnthe board takes the clock from the PSTN interface; for OC-3/STM-1
links the clock is taken from the high-level communication layer protocol of
the PSTN interface; for T3/E1/T1 trunks the clock is taken from one of the
available T3/E1/T1 trunks; selection of the T3/E1/T1 trunk is performed
according to Clock Reference Candidate and Clock Reference Priority
parameters setting trunk with Clock Reference Candidate set to enabled
and the highest “Clock Reference Priority” selected.

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