STBY-SPE (Standby SPE)
Issue 4 May 2002
10-1519555-233-123
Components in Standby SPE Complex
The Standby SPE maintenance object is actually a composite of all the circuit
packs in the Standby SPE.
The TN778 Packet Control circuit pack, the TN765 Processor Interface circuit
pack(s), and the TN772 Duplication Interface circuit pack are used.
!
WARNING:
Verify that there is an identical set of SPE complex circuit packs in each
SPE. For example, there should be the same number of Memory circuit
pack(s) in each SPE. If there are Processor Interface circuit pack(s) (one or
two) in the Active SPE, the same number of PI circuit packs must be present
in the Standby SPE. If one SPE has a Packet Control Circuit Pack, the other
SPE must also have one. If the set of circuit packs in each SPE is not
identical, alarms could result against the STBY-SPE, DUPINT, SHDW-CIR,
PI-BD, PKT-CTRL, PROCR, MEM-BD and MEMORY maintenance objects.
The accessing and testing of the Standby SPE may be affected by the health of
the circuit packs through which the Active SPE communicates with the Standby
SPE. These circuit packs include the Active SPE Processor circuit pack, the
Duplication Interface circuit pack in the A carrier, and the Standby SPE Processor
circuit pack. Additionally, the Inter-Carrier Cable (ICC) and the backplane affect
the ability of the Active SPE to communicate with the Standby SPE. The ability to
shadow Active SPE memory into Standby SPE memory is affected by the
Duplication Interface circuit pack in the A carrier, the Duplication Interface circuit
pack in the B carrier, and the Memory circuit pack(s) in the Standby SPE.
Additionally, the Active SPE Memory Bus, the ICC, backplane, and the Standby
SPE Memory Bus affect the ability to correctly shadow Active SPE memory into
Standby SPE memory.
These dependencies for the TN2404/TN790 are shown in Figure 10-89 on page
10-1520, which depicts the interconnection between the two SPEs of a High or
Critical Reliability system. The following circuit pack abbreviations are used in
Figure 10-89 on page 10-1520:
■ DUPINT for Duplication Interface circuit pack
■ PI for Processor Interface
■ Net Pkt for Network Controller/Packet Interface
The dashed lines in the figure represent important logical connections between
components.
Refer to the DUPINT, SHDW-CIR, MEM-BD, MEMORY, PROCR, PR-MAINT,
TDM-BUS, PKT-BUS, TDM-CLK, PI-BD, PI-SCI, PKT-CTRL, SW-CTL,
DATA-CHL, CARD-MEM and STBY-SPE for descriptions of the individual
components.
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