ST STM32F40 Series User Manual

RM0090 Reset and clock control for (RCC)
Doc ID 018909 Rev 4 138/1422
6.3.9 RCC APB1 peripheral reset register for
STM32F42xxx and STM32F43xxx (RCC_APB1RSTR)
Address offset: 0x20
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
UART8R
ST
UART7R
ST
DACRST
PWR
RST
Reser-
ved
CAN2
RST
CAN1
RST
Reser-
ved
I2C3
RST
I2C2
RST
I2C1
RST
UART5
RST
UART4
RST
UART3
RST
UART2
RST
Reser-
ved
rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
SPI3
RST
SPI2
RST
Reserved
WWDG
RST
Reserved
TIM14
RST
TIM13
RST
TIM12
RST
TIM7
RST
TIM6
RST
TIM5
RST
TIM4
RST
TIM3
RST
TIM2
RST
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31 UART8RST: UART8 reset
Set and cleared by software.
0: does not reset UART8
1: resets UART8
Bits 30 UART7RST: UART7 reset
Set and cleared by software.
0: does not reset UART7
1: resets UART7
Bit 29 DACRST: DAC reset
Set and cleared by software.
0: does not reset the DAC interface
1: resets the DAC interface
Bit 28 PWRRST: Power interface reset
Set and cleared by software.
0: does not reset the power interface
1: resets the power interface
Bit 27 Reserved, must be kept at reset value.
Bit 26 CAN2RST: CAN2 reset
Set and cleared by software.
0: does not reset CAN2
1: resets CAN2
Bit 25 CAN1RST: CAN1 reset
Set and cleared by software.
0: does not reset CAN1
1: resets CAN1
Bit 24 Reserved, must be kept at reset value.
Bit 23 I2C3RST: I2C3 reset
Set and cleared by software.
0: does not reset I2C3
1: resets I2C3

ST STM32F40 Series Specifications

General

Brand	ST
Model	STM32F40 Series
Category	Microcontrollers
Language	English