Real-time clock (RTC) RM0090
627/1422 Doc ID 018909 Rev 4
Figure 222. RTC block diagram
1. On STM32F4xx devices, the RTC_AF1 and RTC_AF2 alternate functions are connected to PC13 and PI8, respectively.
23.3 RTC functional description
23.3.1 Clock and prescalers
The RTC clock source (RTCCLK) is selected through the clock controller among the LSE
clock, the LSI oscillator clock, and the HSE clock. For more information on the RTC clock
source configuration, refer to Section 6: Reset and clock control for (RCC).
A programmable prescaler stage generates a 1 Hz clock which is used to update the
calendar. To minimize power consumption, the prescaler is split into 2 programmable
prescalers (see Figure 222: RTC block diagram):
● A 7-bit asynchronous prescaler configured through the PREDIV_A bits of the
RTC_PRER register.
● A 15-bit synchronous prescaler configured through the PREDIV_S bits of the
RTC_PRER register.
Note: When both prescalers are used, it is recommended to configure the asynchronous prescaler
to a high value to minimize consumption.
MS19902V3
ck_apre
(default 256 Hz)
ck spre
(default 1 Hz)
RTC_CALIB
512 Hz
RTC_WUTR
RTCCLK
WUTF
HSE_RTC
(4 MHz max)
LSE (32.768 Hz)
LSI
Asyn ch.
7-bit prescaler
(default = 128)
Synchronous
15-bit prescaler
(default = 256)
Calendar
16-bit wakeup
auto-reload timer
Alarm A
(RTC_ALRMAR
registers)
ALRAF
RTC_ALARM
RTC_PRER RTC_PRER
Shadow registers
(RTC_TR,
RTC_DR)
Coarse
Calibration
RTC_CALIBR
==
ALRBF
Time stamp
registe rs
TSF
Output
control
RTC_AF1
RTC_OUT
1 Hz
=
RTC_ALRMASSR
Alarm B
(RTC_ALRMBR
registers)
RTC_ALRMBSSR
Smooth
calibration
RTC_CALR
Prescaler
/ 2, 4, 8, 16
WUCKSEL[1:0]
Backup and
RTC tamper
control registers
RTC_TAMP1
RTC_TS
TAMPE
TSE
RTC_AF2
Shadow register
(RTC_SSR)
RTC_TAMP2
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