Cryptographic processor (CRYP) RM0090
551/1422 Doc ID 018909 Rev 4
Figure 202. Block diagram (STM32F42xxx and STM32F43xxx)
20.3.1 DES/TDES cryptographic core
The DES/Triple-DES cryptographic core consists of three components:
● The DES algorithm (DEA)
● Multiple keys (1 for the DES algorithm, 1 to 3 for the TDES algorithm)
● The initialization vector (used in the CBC mode)
The basic processing involved in the TDES is as follows: an input block is read in the DEA
and encrypted using the first key, K1 (K0 is not used in TDES mode). The output is then
decrypted using the second key, K2, and encrypted using the third key, K3. The key
depends on the algorithm which is used:
● DES mode: Key = [K1]
● TDES mode: Key = [K3 K2 K1]
where Kx=[KxR KxL], R = right, L = left
According to the mode implemented, the resultant output block is used to calculate the
ciphertext.
Note that the outputs of the intermediate DEA stages is never revealed outside the
cryptographic boundary.
32-bit AHB2 bus
Processor core
DES/TDES/AES
CRYP_DIN CRYP_DOUT
swappi ng
swappin g
8 × 32-bit
IN FIFO
8 × 32-bit
OUT FIFO
CRYP_CR
CRYP_K0...K3
CRYP_IV0...IV1
IV0...IV127
k255...k0
CRYP_IMSCR
CRYP_RIS
CRYP_MISR
CRYP_DMACR
CRYP_SR
Status
DMA control register
Interrupt registers
Control register
Initialization vectors
Key
MS30441V1
CRYP_CSGCMCCM0..7
Context swapping
CRYP_CSGCM0..7
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