RM0090 General-purpose timers (TIM2 to TIM5)
Doc ID 018909 Rev 4 434/1422
15.3.3 Clock selection
The counter clock can be provided by the following clock sources:
● Internal clock (CK_INT)
● External clock mode1: external input pin (TIx)
● External clock mode2: external trigger input (ETR) available on TIM2, TIM3 and TIM4
only.
● Internal trigger inputs (ITRx): using one timer as prescaler for another timer, for
example, you can configure Timer to act as a prescaler for Timer 2. Refer to : Using
one timer as prescaler for another on page 453 for more details.
Internal clock source (CK_INT)
If the slave mode controller is disabled (SMS=000 in the TIMx_SMCR register), then the
CEN, DIR (in the TIMx_CR1 register) and UG bits (in the TIMx_EGR register) are actual
control bits and can be changed only by software (except UG which remains cleared
automatically). As soon as the CEN bit is written to 1, the prescaler is clocked by the internal
clock CK_INT.
Figure 139 shows the behavior of the control circuit and the upcounter in normal mode,
without prescaler.
Figure 139. Control circuit in normal mode, internal clock divided by 1
External clock source mode 1
This mode is selected when SMS=111 in the TIMx_SMCR register. The counter can count
at each rising or falling edge on a selected input.
CK_INT
00
Counter clock = CK_CNT = CK_PSC
COUNTER REGISTER
01 02 03 04 05 06 0732 33 34 35 3631
CEN=CNT_EN
UG
CNT_INIT
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