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ST STM32F40 Series User Manual

ST STM32F40 Series
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RM0090 Debug support (DBG)
Doc ID 018909 Rev 4 1400/1422
33.17 TPIU (trace port interface unit)
33.17.1 Introduction
The TPIU acts as a bridge between the on-chip trace data from the ITM and the ETM.
The output data stream encapsulates the trace source ID, that is then captured by a trace
port analyzer (TPA).
The core embeds a simple TPIU, especially designed for low-cost debug (consisting of a
special version of the CoreSight TPIU).
Figure 428. TPIU block diagram
Bits 15:2 Reserved, must be kept at reset value.
Bit 1 DBG_TIM8_STOP: TIM8 counter stopped when core is halted
0: The clock of the involved Timer Counter is fed even if the core is halted
1: The clock of the involved Timer counter is stopped when the core is halted
Bit 0 DBG_TIM1_STOP: TIM1 counter stopped when core is halted
0: The clock of the involved Timer Counter is fed even if the core is halted
1: The clock of the involved Timer counter is stopped when the core is halted
formatter
Trace out
(serializer)
TRACECLKIN
TRACECK
TRACEDATA
[3:0]
TRACESWO
CLK domain
TRACECLKIN domain
External PPB bus
TPIU
TPIU
Asynchronous
FIFO
Asynchronous
FIFO
ETM
ITM
ai17114

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ST STM32F40 Series Specifications

General IconGeneral
BrandST
ModelSTM32F40 Series
CategoryMicrocontrollers
LanguageEnglish

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