ST STM32F40 Series User Manual

Reset and clock control for (RCC) RM0090
135/1422 Doc ID 018909 Rev 4
6.3.7 RCC AHB3 peripheral reset register (RCC_AHB3RSTR)
Address offset: 0x18
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
6.3.8 RCC APB1 peripheral reset register for
STM32F405xx/07xx and STM32F415xx/17xx(RCC_APB1RSTR)
Address offset: 0x20
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
1514131211109 87654321 0
Reserved
FSMCRST
rw
Bits 31:1 Reserved, must be kept at reset value.
Bit 0 FSMCRST: Flexible static memory controller module reset
Set and cleared by software.
0: does not reset the FSMC module
1: resets the FSMC module
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
DACRST
PWR
RST
Reser-
ved
CAN2
RST
CAN1
RST
Reser-
ved
I2C3
RST
I2C2
RST
I2C1
RST
UART5
RST
UART4
RST
UART3
RST
UART2
RST
Reser-
ved
rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
SPI3
RST
SPI2
RST
Reserved
WWDG
RST
Reserved
TIM14
RST
TIM13
RST
TIM12
RST
TIM7
RST
TIM6
RST
TIM5
RST
TIM4
RST
TIM3
RST
TIM2
RST
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:30 Reserved, must be kept at reset value.
Bit 29 DACRST: DAC reset
Set and cleared by software.
0: does not reset the DAC interface
1: resets the DAC interface
Bit 28 PWRRST: Power interface reset
Set and cleared by software.
0: does not reset the power interface
1: resets the power interface

ST STM32F40 Series Specifications

General

Brand	ST
Model	STM32F40 Series
Category	Microcontrollers
Language	English