ST STM32F40 Series

General-purpose timers (TIM2 to TIM5) RM0090
433/1422 Doc ID 018909 Rev 4
Figure 137. Counter timing diagram, Update event with ARPE=1 (counter underflow)
Figure 138. Counter timing diagram, Update event with ARPE=1 (counter overflow)
00
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
Counter underflow
Update event (UEV)
01 02 03 04 05 06 0705 04 03 02 0106
Auto-reload preload register
FD 36
Write a new value in TIMx_ARR
Auto-reload active register
FD 36
CK_INT
36
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
Counter overflow
Update event (UEV)
35 34 33 32 31 30 2FF8 F9 FA FB FCF7
Auto-reload preload register
FD 36
Write a new value in TIMx_ARR
Auto-reload active register
FD 36
CK_INT