ST STM32F40 Series

RM0090 Flexible static memory controller (FSMC)
Doc ID 018909 Rev 4 1330/1422
Mode A - SRAM/PSRAM (CRAM) OE toggling
Figure 407. ModeA read accesses
1. NBL[1:0] are driven low during read access.
Figure 408. ModeA write accesses
A[25:0]
NOE
ADDSET DATAST
Memory transaction
NEx
D[15:0]
HCLK cycles HCLK cycles
NWE
NBL[1:0]
data driven
by memory
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High
A[25:0]
NOE
ADDSET (DATAST + 1)
Memory transaction
NEx
D[15:0]
HCLK cycles HCLK cycles
NWE
NBL[1:0]
data driven by FSMC
ai15560
1HCLK