ST STM32F40 Series User Manual

RM0090 DMA controller (DMA)
Doc ID 018909 Rev 4 228/1422
The structure of the FIFO differs depending on the source and destination data widths, and
is described in Figure 31: FIFO structure.
Figure 31. FIFO structure
FIFO threshold and burst configuration
Caution is required when choosing the FIFO threshold (bits FTH[1:0] of the DMA_SxFCR
register) and the size of the memory burst (MBURST[1:0] of the DMA_SxCR register): The
content pointed by the FIFO threshold must exactly match to an integer number of memory
burst transfers. If this is not in the case, a FIFO error (flag FEIFx of the DMA_HISR or
DMA_LISR register) will be generated when the stream is enabled, then the stream will be
automatically disabled. The allowed and forbidden configurations are described in the
Table 41: FIFO threshold configurations.
Table 41. FIFO threshold configurations
MSIZE FIFO level MBURST = INCR4 MBURST = INCR8 MBURST = INCR16
Byte
1/4 1 burst of 4 beats
forbidden
forbidden1/2 2 bursts of 4 beats 1 burst of 8 beats
3/4 3 bursts of 4 beats
forbidden
Full 4 bursts of 4 beats 2 bursts of 8 beats 1 burst of 16 beats
Source: byte
4 words
byte lane 0
byte lane 1
byte lane 2
byte lane 3
1/4 1/2 3/4 FullEmpty
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B 11
B12
B13
B14
B15
Destination: word
Source: byte
Destination: half-word
4 words
byte lane 0
byte lane 1
byte lane 2
byte lane 3
1/4 1/2 3/4 FullEmpty
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B 11
B12
B13
B14
B15
W0W1W2W3
H0
H1
H2
H3
H4
H5
H6
H7
Source: half-word
Destination: word
4 words
byte lane 0
byte lane 1
byte lane 2
byte lane 3
1/4 1/2 3/4 FullEmpty
H0
W0W1W2W3
H1
H2
H3
H4
H5
H6
H7
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
H7 H6 H5 H4 H3 H2 H1 H0
H7, H6, H5, H4, H3, H2, H1, H0
W3, W2, W1, W0
W3, W2, W1, W0
Source: half-word
4-words
byte lane 0
byte lane 1
byte lane 2
byte lane 3
1/4 1/2 3/4 FullEmpty
Destination: byte
H7 H6 H5 H4 H3 H2 H1 H0
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B 11
B12
B13
B14
B15
H0
H1
H2
H3
H4
H5
H6
H7
B15 B14 B13 B12 B11 B10 B9 B8
B7 B6 B5 B4 B3 B2 B1 B0
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ST STM32F40 Series Specifications

General

Brand	ST
Model	STM32F40 Series
Category	Microcontrollers
Language	English