RM0090 Random number generator (RNG)
Doc ID 018909 Rev 4 594/1422
21 Random number generator (RNG)
This section applies to the whole STM32F4xx family devices, unless otherwise specified.
21.1 RNG introduction
The RNG processor is a random number generator, based on a continuous analog noise,
that provides a random 32-bit value to the host when read.
The RNG passed the FIPS PUB 140-2 (2001 October 10) tests with a success ratio of 99%.
21.2 RNG main features
● It delivers 32-bit random numbers, produced by an analog generator
● 40 periods of the PLL48CLK clock signal between two consecutive random numbers
● Monitoring of the RNG entropy to flag abnormal behavior (generation of stable values,
or of a stable sequence of values)
● It can be disabled to reduce power-consumption
21.3 RNG functional description
Figure 217 shows the RNG block diagram.
Figure 217. Block diagram
The random number generator implements an analog circuit. This circuit generates seeds
that feed a linear feedback shift register (RNG_LFSR) in order to produce 32-bit random
numbers.
The analog circuit is made of several ring oscillators whose outputs are XORed to generate
the seeds. The RNG_LFSR is clocked by a dedicated clock (PLL48CLK) at a constant
frequency, so that the quality of the random number is independent of the HCLK frequency.
32-bit AHB bus
RNG_DR
RNG
_CR
RNG
_SR
Status register
Control register
fault detector
LFSR
Analog seed
RNG_CLK
Clock checker &
data register
Shift Register
feed a Linear Feedback
ai16080
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