Universal synchronous asynchronous receiver transmitter (USART) RM0090
753/1422 Doc ID 018909 Rev 4
When noise is detected in a frame:
● The NF bit is set at the rising edge of the RXNE bit.
● The invalid data is transferred from the Shift register to the USART_DR register.
● No interrupt is generated in case of single byte communication. However this bit rises
at the same time as the RXNE bit which itself generates an interrupt. In case of
multibuffer communication an interrupt will be issued if the EIE bit is set in the
USART_CR3 register.
The NF bit is reset by a USART_SR register read operation followed by a USART_DR
register read operation.
Note: Oversampling by 8 is not available in the Smartcard, IrDA and LIN modes. In those modes,
the OVER8 bit is forced to ‘0 by hardware.
Figure 251. Data sampling when oversampling by 16
Figure 252. Data sampling when oversampling by 8
Table 107. Noise detection from sampled data
Sampled value NE status Received bit value
000 0 0
001 1 0
010 1 0
011 1 1
100 1 0
101 1 1
RX LINE
Sample
clock
1234567891011
12
13 14 15 16
sampled values
One bit time
6/16
7/16
7/16
RX LINE
One bit time
3/8
3/8
12345678
2/8
Sample
clock(x8)
sampled values
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