ST STM32F40 Series User Manual

USB on-the-go high-speed (OTG_HS) RM0090
1301/1422 Doc ID 018909 Rev 4
Examples
This section describes and depicts some fundamental transfer types and scenarios.
● Slave mode bulk OUT transaction
Figure 397 depicts the reception of a single Bulk OUT Data packet from the USB to the AHB
and describes the events involved in the process.
Figure 397. Slave mode bulk OUT transaction
After a SetConfiguration/SetInterface command, the application initializes all OUT endpoints
by setting CNAK = 1 and EPENA = 1 (in OTG_HS_DOEPCTLx), and setting a suitable
XFRSIZ and PKTCNT in the OTG_HS_DOEPTSIZx register.
1. Host attempts to send data (OUT token) to an endpoint.
2. When the core receives the OUT token on the USB, it stores the packet in the RxFIFO
because space is available there.
3. After writing the complete packet in the RxFIFO, the core then asserts the RXFLVL
interrupt (in OTG_HS_GINTSTS).
4. On receiving the PKTCNT number of USB packets, the core internally sets the NAK bit
for this endpoint to prevent it from receiving any more packets.
5. The application processes the interrupt and reads the data from the RxFIFO.
6. When the application has read all the data (equivalent to XFRSIZ), the core generates
an XFRC interrupt (in OTG_HS_DOEPINTx).
7. The application processes the interrupt and uses the setting of the XFRC interrupt bit
(in OTG_HS_DOEPINTx) to determine that the intended transfer is complete.
init_out_ep
Host DeviceUSB
O
U
T
A
C
K
RXFLVL intr i
wr_reg (DOEPTSIZx)
wr_reg(DOEPCTLx)
512 bytes
O
U
T
N
A
K
xact _1
Application
XFRC
i
n
t
r
D
O
E
P
C
T
L
x
.
N
A
K
=
1
PKTCNT
0
XFRSIZ = 0
r
idle until intr
rcv_out _pkt()
idle until intr
On new xfer
or RxFIFO
not empty
1
2
3
4
5
6
7
8
XFRSIZ
= 512 bytes
PKTCNT = 1
EPENA = 1
CNAK = 1
ai15679

ST STM32F40 Series Specifications

General

Brand	ST
Model	STM32F40 Series
Category	Microcontrollers
Language	English