Cryptographic processor (CRYP) RM0090
549/1422 Doc ID 018909 Rev 4
● DES/TDES
– Direct implementation of simple DES algorithms (a single key, K1, is used)
– Supports the ECB and CBC chaining algorithms
– Supports 64-, 128- and 192-bit keys (including parity)
– 2 × 32-bit initialization vectors (IV) used in the CBC mode
– 16 HCLK cycles to process one 64-bit block in DES
– 48 HCLK cycles to process one 64-bit block in TDES
● Common to DES/TDES and AES
– IN and OUT FIFO (each with an 8-word depth, a 32-bit width, corresponding to 4
DES blocks or 2 AES blocks)
– Automatic data flow control with support of direct memory access (DMA) (using 2
channels, one for incoming data the other for processed data)
– Data swapping logic to support 1-, 8-, 16- or 32-bit data
192b 16 16 16 28 10 16 16 14 16 29 16
256b 18 18 18 32 10 18 18 16 18 33 18
Table 90. Number of cycles required to process each 128-bit block
(STM32F42xxx and STM32F43xxx)
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