MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 95
6.3 Fast external crystal oscillator (FXOSC) digital interface
The FXOSC digital interface controls the operation of the 4–16 MHz fast external crystal oscillator
(FXOSC). It holds control and status registers accessible for application.
6.3.1 Main features
• Oscillator powerdown control and status reporting through MC_ME block
• Oscillator clock available interrupt
• Oscillator bypass mode
• Output clock division factors ranging from 1, 2, 3....32
6.3.2 Functional description
The FXOSC circuit includes an internal oscillator driver and an external crystal circuitry. It provides an
output clock that can be provided to the FMPLL or used as a reference clock to specific modules depending
on system needs.
The FXOSC can be controlled by the MC_ME module. The ME_xxx_MC[FXOSCON] bit controls the
powerdown of the oscillator based on the current device mode while ME_GS[S_XOSC] register provides
the oscillator clock available status.
After system reset, the oscillator is put into powerdown state and software has to switch on when required.
Whenever the crystal oscillator is switched on from the off state, the OSCCNT counter starts and when it
FlexCAN_n 16+n (n = 0..5) 2
ADC 32 3
I
2
C441
LINFLEX_n 48+n(n = 0..3) 1
CTU 57 3
CANS 60 —
SIUL 68 —
WKUP 69 —
eMIOS_n 72+n (n = 0..1) 3
RTC/API 91 —
PIT 92 —
CMU 104 —
1
See the ME_PCTL section in this reference manual for details.
2
“—” means undivided system clock.
Table 6-1. MPC5604B — Peripheral clock sources (continued)
Peripheral
Register gating address offset
(base = 0xC3FDC0C0)
1
Peripheral set
2
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