Freescale Semiconductor MPC5604B - Initialization and Application Information

MPC5604B/C Microcontroller Reference Manual, Rev. 8
516 Freescale Semiconductor
DSPIx_TCR during module disable mode does not have an effect. Interrupt request signals cannot be
cleared while in the module disable mode.
23.6.8.2 Slave interface signal gating
The DSPI module enable signal is used to gate slave interface signals such as address, byte enable,
read/write and data. This prevents toggling slave interface signals from consuming power unless the DSPI
is accessed.
23.7 Initialization and application information
23.7.1 How to change queues
DSPI queues are not part of the DSPI module, but the DSPI includes features in support of queue
management. Queues are primarily supported in SPI configuration. This section presents an example of
how to change queues for the DSPI.
1. The last command word from a queue is executed. The EOQ bit in the command word is set to
indicate to the DSPI that this is the last entry in the queue.
2. At the end of the transfer, corresponding to the command word with EOQ set is sampled, the EOQ
flag (EOQF) in the DSPIx_SR is set.
3. The setting of the EOQF flag disables both serial transmission, and serial reception of data, putting
the DSPI in the STOPPED state. The TXRXS bit is negated to indicate the STOPPED state.
4. Ensure all received data in RX FIFO has been transferred to memory receive queue by reading the
RXCNT in DSPIx_SR or by checking RFDF in the DSPIx_SR after each read operation of the
DSPIx_POPR.
5. Flush TX FIFO by writing a ‘1’ to the CLR_TXF bit in the DSPIx_MCR register and flush the RX
FIFO by writing a ‘1’ to the CLR_RXF bit in the DSPIx_MCR register.
6. Clear transfer count either by setting CTCNT bit in the command word of the first entry in the new
queue or via CPU writing directly to SPI_TCNT field in the DSPIx_TCR.
7. Enable serial transmission and serial reception of data by clearing the EOQF bit.
23.7.2 Baud rate settings
Table 23-33 shows the baud rate that is generated based on the combination of the baud rate prescaler PBR
and the baud rate scaler BR in the DSPIx_CTARs. The values are calculated at a 64 MHz system
frequency.