MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 837
eMIOS_0 UC21 A Register EMIOS0_UC21_A 32-bit Base + 0x02C0
eMIOS_0 UC21 B Register EMIOS0_UC21_B 32-bit Base + 0x02C4
Reserved — — Base + 0x02C8 –
Base + 0x02CB
eMIOS_0 UC21 Control Register EMIOS0_UC21_SC 32-bit Base + 0x02CC
eMIOS_0 UC21 Status Register EMIOS0_UC21_SS 32-bit Base + 0x02D0
Reserved — — Base + 0x02D4 –
Base + 0x02DF
eMIOS_0 UC22 A Register EMIOS0_UC22_A 32-bit Base + 0x02E0
eMIOS_0 UC22 B Register EMIOS0_UC22_B 32-bit Base + 0x02E4
Reserved — — Base + 0x02E8 –
Base + 0x02EB
eMIOS_0 UC22 Control Register EMIOS0_UC22_SC 32-bit Base + 0x02EC
eMIOS_0 UC22 Status Register EMIOS0_UC22_SS 32-bit Base + 0x02F0
Reserved — — Base + 0x02F4 –
Base + 0x02FF
eMIOS_0 UC23 A Register EMIOS0_UC23_A 32-bit Base + 0x0300
eMIOS_0 UC23 B Register EMIOS0_UC23_B 32-bit Base + 0x0304
eMIOS_0 UC23 CNT EMIOS0_UC23_CNT 32-bit Base + 0x0308
eMIOS_0 UC23 Control Register EMIOS0_UC23_SC 32-bit Base + 0x030C
eMIOS_0 UC23 Status Register EMIOS0_UC23_SS 32-bit Base + 0x0310
Reserved — — Base + 0x0314 –
Base + 0x031F
eMIOS_1 0xC3FA_4000
EMIOS Module Configuration Register eMIOS1_MCR 32-bit Base + 0x0000
EMIOS Global FLAG Register eMIOS1_GFLAG 32-bit Base + 0x0004
EMIOS Output Update Disable Register eMIOS1_OUDIS 32-bit Base + 0x0008
EMIOS Disable Channel Register eMIOS1_UCDIS 32-bit Base + 0x000C
Reserved — — (Base + 0x001C) –
(Base + 0x001F)
eMIOS_1 UC0 A Register eMIOS1_UC0_A 32-bit Base + 0x0020
eMIOS_1 UC0 B Register eMIOS1_UC0_B 32-bit Base + 0x0024
eMIOS_1 UC0 CNT eMIOS1_UC0_CNT 32-bit Base + 0x0028
eMIOS_1 UC0 Control Register eMIOS1_UC0_SC 32-bit Base + 0x002C
Table A-2. Detailed register map (continued)
Register description Register name
Used
size
Address