MPC5604B/C Microcontroller Reference Manual, Rev. 8
350 Freescale Semiconductor
Table 19-21. IFCPR field descriptions
19.6 Functional description
19.6.1 Pad control
The SIUL controls the configuration and electrical characteristic of the device pads. It provides a
consistent interface for all pads, both on a by-port and a by-bit basis. The pad configuration registers
(PCRn, see Section 19.5.3.8, “Pad Configuration Registers (PCR0–PCR122)) allow software control of
the static electrical characteristics of external pins with a single write. These are used to configure the
following pad features:
• Open drain output enable
• Slew rate control
• Pull control
• Pad assignment
• Control of analog path switches
• Safe mode behavior configuration
19.6.2 General purpose input and output pads (GPIO)
The SIUL manages up to 123 GPIO pads organized as ports that can be accessed for data reads and writes
as 32, 16 or 8-bit
1
.
NOTE
Ports are organized as groups of 16 GPIO pads, with the exception of Port J,
which has 5. A 32-bit R/W operation accesses two ports simultaneously. A
16-bit operation accesses a full port and an 8-bit access either the upper or
lower byte of a port.
As shown in Figure 19-15, all port accesses are identical with each read or write being performed only at
a different location to access a different port width.
Field Description
IFCP Interrupt Filter Clock Prescaler setting
Prescaled Filter Clock Period = T(FIRC) x (IFCP + 1)
T(FIRC) is the fast internal RC oscillator period.
IFCP can be 0 to 15.
1.There are exceptions. Some pads, e.g., precision analog pads, are input only.
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