MPC5604B/C Microcontroller Reference Manual, Rev. 8
804 Freescale Semiconductor
33.4.2 Operating Mode
In full-port mode, all available MDO pins are used to transmit messages. All trace features are enabled or
can be enabled by writing the configuration registers via the JTAG port. Four MDO pins are available in
full-port mode.
33.4.2.1 Disabled-Port Mode
In disabled-port mode, message transmission is disabled. Any debug feature that generates messages can
not be used. The primary features available are class 1 features and read/write access.
33.4.2.2 Censored Mode
The NDI supports internal flash censorship mode by preventing the transmission of trace messages and
Nexus access to memory-mapped resources when censorship is enabled.
33.4.2.3 Stop Mode
Stop mode logic is implemented in the NPC. When a request is made to enter STOP mode, the NDI block
completes monitoring of any pending bus transaction, transmits all messages already queued, and
acknowledges the stop request. After the acknowledgment, the system clock input are shut off by the clock
driver on the device. While the clocks are shut off, the development tool cannot access NDI registers via
the JTAG port.
33.5 External Signal Description
All the signals are available in the 208BGA without any multiplexing scheme. Refer to Chapter 4, “Signal
description for details.
33.5.1 Nexus Signal Reset States
33.6 Memory Map and Register Description
The NDI block contains no memory-mapped registers. Nexus registers are accessed by a development tool
via the JTAG port using a client-select value and a register index. OnCE registers are accessed by loading
the appropriate value in the RS[0:6] field of the OnCE command register (OCMD) via the JTAG port.
Table 33-1. NDI Signal Reset State
Name Function
Nexus Reset
State
Pull
EVTI Event-in pin — Up
EVTO Event-out pin 0b1 —
MCKO Message clock out pin 0b0 —
MDO[3:0] Message data out pins 0 —
MSEO Message start/end out pin 0b1 —
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