Freescale Semiconductor MPC5604B - DSPI PUSH TX FIFO Register (Dspix_Pushr)

MPC5604B/C Microcontroller Reference Manual, Rev. 8
490 Freescale Semiconductor
23.5.7 DSPI PUSH TX FIFO Register (DSPIx_PUSHR)
The DSPIx_PUSHR provides a means to write to the TX FIFO. Data written to this register is transferred
to the TX FIFO. See Section 23.6.3.4, Transmit First In First Out (TX FIFO) buffering mechanism, for
more information. Write accesses of 8 or 16 bits to the DSPIx_PUSHR transfers 32 bits to the TX FIFO.
NOTE
TXDATA is used in master and slave modes.
RFOF_RE Receive FIFO overflow request enable
Enables the RFOF flag in the DSPIx_SR to generate an interrupt requests.
0 RFOF interrupt requests are disabled
1 RFOF interrupt requests are enabled
RFDF_RE Receive FIFO drain request enable
Enables the RFDF flag in the DSPIx_SR to generate a request. The RFDF_DIRS bit selects an
interrupt request.
0 RFDF interrupt requests are disabled
1 RFDF interrupt requests are enabled
RFDF_DIRS Receive FIFO drain interrupt request select
Selects an interrupt request. When the RFDF flag bit in the DSPIx_SR is set, and the RFDF_RE bit
in the DSPIx_RSER is set, the RFDF_DIRS bit selects an interrupt request.
0 Interrupt request is selected
1 Reserved
Offset:0x34 Access: Read/write
0123456789101112131415
R
CONT
CTAS EOQ
CTCNT
00
00
PCS5 PCS4 PCS3 PCS2 PCS1 PCS0
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TXDATA
W
Reset0000000000000000
Figure 23-8. DSPI PUSH TX FIFO Register (DSPIx_PUSHR)
Table 23-19. DSPIx_RSER field descriptions (continued)
Field Description