Freescale Semiconductor MPC5604B - External Signal Description

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 535
24.4.1.4.1 Channel mode selection
Channel modes are selected using the mode selection bits MODE[0:6] in the eMIOS UC Control Register
(EMIOSC[n]). Table 24-21 provides the specific mode selection settings for the eMIOS implementation
on this device.
24.4.2 External signal description
For information on eMIOS external signals on this device, please refer to the signal description chapter of
the reference manual.
24.4.3 Memory map and register description
24.4.3.1 Memory maps
The overall address map organization is shown in Table 24-9.
24.4.3.1.1 Unified Channel memory map
Table 24-9. eMIOS memory map
Base addresses:
0xC3FA_0000 (eMIOS_0)
0xC3FA_4000 (eMIOS_1)
Address offset Description Location
0x000–0x003 eMIOS Module Configuration Register (EMIOSMCR) on page 536
0x004–0x007 eMIOS Global FLAG (EMIOSGFLAG) Register on page 537
0x008–0x00B eMIOS Output Update Disable (EMIOSOUDIS) Register on page 538
0x00C–0x00F eMIOS Disable Channel (EMIOSUCDIS) Register on page 539
0x010–0x01F Reserved —
0x020–0x11F Channel [0]
to
Channel [7]
—
0x120–0x21F Channel [8]
to
Channel [15]
—
0x220–0x31F Channel [16]
to
Channel [23]
—
0x320–0x39F Channel [24]
to
Channel [27]
—
0x3A0–0xFFF Reserved —