Freescale Semiconductor MPC5604B - Block Diagram

MPC5604B/C Microcontroller Reference Manual, Rev. 8
32 Freescale Semiconductor
2.2.2 Block diagram
Figure 2-1 shows a top-level block diagram of the MPC5604B family.
Figure 2-1. MPC5604B block diagram
3 x
DSPI
FMPLL
Nexus 2+
Nexus
SRAM
SIUL
Reset control
48 KB
External
IMUX
GPIO and
JTAG
pad control
JTAG port
Nexus port
e200z0h
Interrupt requests
64-bit 2 x 3 Crossbar Switch
6 x
FlexCAN
Peripheral bridge
interrupt
request
Interrupt
request
I/O
Clocks
Instructions
Data
Voltage
regulator
NMI
SWT
PIT
STM
NMI
SIUL
. . .
. . .
. . .
. . .
INTC
I
2
C
. . .
4 x
LINFlex
2 x
eMIOS
36 Ch.
ADC
MPU
CMU
SRAM
Flash
Code Flash
512 KB
Data Flash
64 KB
MC_PCUMC_MEMC_CGMMC_RGM
BAM
CTU
RTC
SSCM
(Master)
(Master)
(Slave)
(Slave)
(Slave)
controller
controller
Legend:
ADC Analog-to-Digital Converter
BAM Boot Assist Module
FlexCAN Controller Area Network
CMU Clock Monitor Unit
CTU Cross Triggering Unit
DSPI Deserial Serial Peripheral Interface
eMIOS Enhanced Modular Input Output System
FMPLL Frequency-Modulated Phase-Locked Loop
I
2
C Inter-integrated Circuit Bus
IMUX Internal Multiplexer
INTC Interrupt Controller
JTAG JTAG controller
LINFlex Serial Communication Interface (LIN support)
ECSM Error Correction Status Module
MC_CGM Clock Generation Module
MC_ME Mode Entry Module
MC_PCU Power Control Unit
MC_RGM Reset Generation Module
MPU Memory Protection Unit
Nexus Nexus Development Interface (NDI) Level
NMI Non-Maskable Interrupt
PIT Periodic Interrupt Timer
RTC Real-Time Clock
SIUL System Integration Unit Lite
SRAM Static Random-Access Memory
SSCM System Status Configuration Module
STM System Timer Module
SWT Software Watchdog Timer
WKPU Wakeup Unit
MPU
ECSM
from peripheral
registers
blocks
WKPU
Interrupt
request with
wakeup
functionality