Freescale Semiconductor MPC5604B - Slow External Crystal Oscillator (SXOSC) Digital Interface

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 97
6.4 Slow external crystal oscillator (SXOSC) digital interface
6.4.1 Introduction
The SXOSC digital interface controls the operation of the 32 KHz slow external crystal oscillator
(SXOSC). It holds control and status registers accessible for application.
6.4.2 Main features
• Oscillator powerdown control and status
• Oscillator bypass mode
• Output clock division factors ranging from 1 to 32
6.4.3 Functional description
The SXOSC circuit includes an internal oscillator driver and an external crystal circuitry. It can be used as
a reference clock to specific modules depending on system needs.
The SXOSC can be controlled via the SXOSC_CTL register. The OSCON bit controls the powerdown
while bit S_OSC provides the oscillator clock available status.
2
You can write a value of "0" or "1" to this field. However, writing a "1" will clear this field, and writing "0" will have no
effect on the field value.
Table 6-3. FXOSC_CTL field descriptions
Field Description
OSCBYP Crystal Oscillator bypass.
This bit specifies whether the oscillator should be bypassed or not.
0 Oscillator output is used as root clock
1 EXTAL is used as root clock
EOCV End of Count Value.
These bits specify the end of count value to be used for comparison by the oscillator stabilization
counter OSCCNT after reset or whenever it is switched on from the off state (OSCCNT runs on the
FXOSC). This counting period ensures that external oscillator clock signal is stable before it can
be selected by the system. When oscillator counter reaches the value EOCV × 512, the crystal
oscillator clock interrupt (I_OSC) request is generated. The OSCCNT counter will be kept under
reset if oscillator bypass mode is selected.
M_OSC Crystal oscillator clock interrupt mask.
0 Crystal oscillator clock interrupt is masked.
1 Crystal oscillator clock interrupt is enabled.
OSCDIV Crystal oscillator clock division factor.
This field specifies the crystal oscillator output clock division factor. The output clock is divided by
the factor OSCDIV+1.
I_OSC Crystal oscillator clock interrupt.
This bit is set by hardware when OSCCNT counter reaches the count value EOCV × 512.
0 No oscillator clock interrupt occurred.
1 Oscillator clock interrupt pending.