Freescale Semiconductor MPC5604B - DSPI POP RX FIFO Register (Dspix_Popr)

MPC5604B/C Microcontroller Reference Manual, Rev. 8
492 Freescale Semiconductor
23.5.8 DSPI POP RX FIFO Register (DSPIx_POPR)
The DSPIx_POPR allows you to read the RX FIFO. See Section 23.6.3.5, Receive First In First Out (RX
FIFO) buffering mechanism for a description of the RX FIFO operations. Eight or 16-bit read accesses to
the DSPIx_POPR fetch the RX FIFO data, and update the counter and pointer.
NOTE
Reading the RX FIFO field fetches data from the RX FIFO. Once the RX
FIFO is read, the read data pointer is moved to the next entry in the RX
FIFO. Therefore, read DSPIx_POPR only when you need the data. For
compatibility, configure the TLB entry for DSPIx_POPR as guarded.
PCSx Peripheral chip select x
Selects which CSx signals are asserted for the transfer.
0 Negate the CSx signal
1 Assert the CSx signal
Note: Use in SPI master mode only.
TXDATA Transmit d a t a
Holds SPI data for transfer according to the associated SPI command.
Note: Use TXDATA in master and slave modes.
Offset:0x38 Access: Read
0123456789101112131415
R0000000000000000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RRXDATA
W
Reset0000000000000000
Figure 23-9. DSPI POP RX FIFO Register (DSPIx_POPR)
Table 23-21. DSPIx_POPR field descriptions
Field Description
RXDATA Received data
The RXDATA field contains the SPI data from the RX FIFO entry pointed to by the pop next data pointer
(POPNXTPTR).
Table 23-20. DSPIx_PUSHR field descriptions (continued)
Field Description