MPC5604B/C Microcontroller Reference Manual, Rev. 8
324 Freescale Semiconductor
18.6.2 Putting it all together and AHB error terminations
For each XBAR slave port being monitored, the MPU performs a reduction-AND of all the individual
(hit_b | error) terms from each access evaluation macro. This expression then terminates the bus cycle with
an error and reports a protection error for three conditions:
1. If the access does not hit in any region descriptor, a protection error is reported.
2. If the access hits in a single region descriptor and that region signals a protection violation, then a
protection error is reported.
3. If the access hits in multiple (overlapping) regions and all regions signal protection violations, then
a protection error is reported.
The third condition reflects that priority is given to permission granting over access denying for
overlapping regions as this approach provides more flexibility to system software in region descriptor
assignments. For an example of the use of overlapping region descriptors, see Section 18.8, “Application
information.
In event of a protection error, the MPU requires two distinct actions:
1. Intercepting the error during the address phase (first cycle out of two) and cancelling the
transaction before it is seen by the slave device
2. Performing the required logic functions to force the standard 2-cycle AHB error response to
properly terminate the bus transaction and then providing the right values to the crossbar switch to
commit the transaction to other portions of the platform.
If, instead, the access is allowed, then the MPU simply passes all “original” signals to the slave device. In
this case, from a functionality point of view, the MPU is fully transparent.
18.7 Initialization information
The reset state of MPU_CESR[VLD] disables the entire module. Recall that, while the MPU is disabled,
all accesses from all bus masters are allowed. This state also minimizes the power dissipation of the MPU.
The power dissipation of each access evaluation macro is minimized when the associated region descriptor
is marked as invalid or when MPU_CESR[VLD] = 0.
Typically the appropriate number of region descriptors (MPU_RGDn) is loaded at system startup,
including the setting of the MPU_RGDn.Word3[VLD] bits, before MPU_CESR[VLD] is set, enabling the
module. This approach allows all the loaded region descriptors to be enabled simultaneously. Recall if a
memory reference does not hit in any region descriptor, the attempted access is terminated with an error.
18.8 Application information
In an operational system, interfacing with the MPU can generally be classified into the following activities:
1. Creation of a new memory region requires loading the appropriate region descriptor into an
available register location. When a new descriptor is loaded into a RGDn, it would typically be
performed using four 32-bit word writes. As discussed in Section 18.5.2.4.4, “MPU Region
Descriptor n, Word 3 (MPU_RGDn.Word3), the hardware assists in the maintenance of the valid