MPC5604B/C Microcontroller Reference Manual, Rev. 8
426 Freescale Semiconductor
22.2.2 Signal descriptions
22.2.2.1 CAN Rx
This pin is the receive pin from the CAN bus transceiver. Dominant state is represented by logic level ‘0’.
Recessive state is represented by logic level ‘1’.
22.2.2.2 CAN Tx
This pin is the transmit pin to the CAN bus transceiver. Dominant state is represented by logic level ‘0’.
Recessive state is represented by logic level ‘1’.
22.3 Memory map and register description
This section describes the registers and data structures in the FlexCAN module. The base address of the
module depends on the particular memory map of the MCU. The addresses presented here are relative to
the base address.
The address space occupied by FlexCAN has 96 bytes for registers starting at the module base address,
followed by MB storage space in embedded SRAM starting at address 0x0060, and an extra ID Mask
storage space in a separate embedded SRAM starting at address 0x0880.
22.3.1 FlexCAN memory mapping
The complete memory map for a FlexCAN module with 64 MBs capability is shown in Table 22-2. Each
individual register is identified by its complete name and the corresponding mnemonic. The access type
can be Supervisor (S) or Unrestricted (U). Most of the registers can be configured to have either Supervisor
or Unrestricted access by programming the SUPV bit in the MCR. These registers are identified as S/U in
the Access column of Table 22-2.
The IFLAG2 and IMASK2 registers are considered reserved space when FlexCAN is configured with 16
or 32 MBs. The Rx Global Mask (RXGMASK), Rx Buffer 14 Mask (RX14MASK) and the Rx Buffer 15
Mask (RX15MASK) registers are provided for backwards compatibility, and are not used when the BCC
bit in MCR is asserted.
The address ranges 0x0060–0x047F and 0x0880–0x097F are occupied by two separate embedded
memories. These two ranges are completely occupied by SRAM (1056 and 256 bytes, respectively) only
when FlexCAN is configured with 64 MBs. When it is configured with 16 MBs, the memory sizes are 288
and 64 bytes, so the address ranges 0x0180–0x047F and 0x08C0–0x097F are considered reserved space.
Table 22-1. FlexCAN signals
Signal name
1
1
The actual MCU pins may have different names.
Direction Description
CAN Rx Input CAN receive pin
CAN Tx Output CAN transmit pin
To Next Page
Loading...
