MPC5604B/C Microcontroller Reference Manual, Rev. 8
332 Freescale Semiconductor
NOTE
A transfer error will be issued when trying to access completely reserved
register space.
19.5.2 Register protection
Individual registers in System Integration Unit Lite can be protected from accidental writes using the
Register Protection module. The following registers can be protected:
• Interrupt Request Enable Register (IRER)
• Interrupt Rising-Edge Event Enable Register (IREER)
• Interrupt Falling-Edge Event Enable Register (IFEER)
• Interrupt Filter Enable Register (IFER),
• Pad Configuration Registers (PCR0–PCR122). Note that only the following registers can be
protected:
— PCR[0:15] (Port A)
— PCR[16:19] (Port B[0:3])
— PCR[34:47] (Port C[2:15])
• Pad Selection for Multiplexed Inputs Registers (PSMI0_3–PSMI28_31)
• Interrupt Filter Maximum Counter Registers (IFMC0–IFMC15). Note that only IFMC[0:15] can
be protected.
• Interrupt Filter Clock Prescaler Register (IFCPR)
0x0CA0–0x0FFF Reserved
0x1000–0x103C Interrupt Filter Maximum Counter Registers (IFMC0–IFMC15)
5
on page 349
0x1040–0x107C Reserved
0x1080 Interrupt Filter Clock Prescaler Register (IFCPR) on page 349
0x1084–0x3FFF Reserved
1
PCR[0:122] is valid in the 144-pin LQFP and the 208 MAPBGA packages, while in the 100-pin LQFP packages is
PCR[0:78], so all the remaining registers are reserved.
2
Not all registers are used. The registers, although byte-accessible are allocated on 32-bit boundaries. There are
some unused registers at the end of the space. The number of unused registers is further reduced in packages with
reduced GPIO pin count.
3
GPDO[0:123] is valid in the 144-pin LQFP and the 208 MAPBGA packages, while in the 100-pin LQFP packages
is GPDO[0:76], so all the remaining registers are reserved.
4
GPDI[0:123] is valid in the 144-pin LQFP and the 208 MAPBGA packages, while in the 100-pin LQFP packages is
GPDI[0:76], so all the remaining registers are reserved.
5
IFMC[0:15] is valid in the 144-pin LQFP and the 208 MAPBGA packages, while in the 100-pin LQFP packages is
IFMC[0:11], so all the remaining registers are reserved.
Table 19-2. SIUL memory map (continued)
Base address: 0xC3F9_0000
Address offset Register Location
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