Freescale Semiconductor MPC5604B - DSPI Transmit FIFO Registers 0-3 (Dspix_Txfrn)

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 493
23.5.9 DSPI Transmit FIFO Registers 0–3 (DSPIx_TXFRn)
The DSPIx_TXFRn registers provide visibility into the TX FIFO for debugging purposes. Each register is
an entry in the TX FIFO. The registers are read-only and cannot be modified. Reading the DSPIx_TXFRn
registers does not alter the state of the TX FIFO. The MCU uses four registers to implement the TX FIFO,
that is DSPIx_TXFR0–DSPIx_TXFR3 are used.
23.5.9.1 DSPI Receive FIFO Registers 0–3 (DSPIx_RXFRn)
The DSPIx_RXFRn registers provide visibility into the RX FIFO for debugging purposes. Each register is
an entry in the RX FIFO. The DSPIx_RXFR registers are read-only. Reading the DSPIx_RXFRn registers
does not alter the state of the RX FIFO. The device uses four registers to implement the RX FIFO, that is
DSPIx_RXFR0–DSPIx_RXFR3 are used.
Offsets: 0x3C–0x48 (4 registers) Access: Read
0123456789101112131415
RTXCMD
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RTXDATA
W
Reset0000000000000000
Figure 23-10. DSPI Transmit FIFO Register 0–3 (DSPIx_TXFRn)
Table 23-22. DSPIx_TXFRn field descriptions
Field Description
TXCMD Transmit command
Contains the command that sets the transfer attributes for the SPI data. See Section 23.5.7, DSPI PUSH
TX FIFO Register (DSPIx_PUSHR), for details on the command field.
TXDATA Transmit d a t a
Contains the SPI data to be shifted out.