MPC5604B/C Microcontroller Reference Manual, Rev. 8
472 Freescale Semiconductor
23.3.4 Debug mode
Debug mode is used for system development and debugging. If the device enters debug mode while the
FRZ bit in the DSPIx_MCR is set, the DSPI halts operation on the next frame boundary. If the device enters
debug mode while the FRZ bit is cleared, the DSPI behavior is unaffected and remains dictated by the
module-specific mode and configuration of the DSPI.
For more information, see Section 23.6.1.4, Debug mode.
23.4 External signal description
23.4.1 Signal overview
Table 23-1 lists off-chip DSPI signals.
23.4.2 Signal names and descriptions
23.4.2.1 Peripheral Chip Select / Slave Select (CS0_x)
In master mode, the CS0_x signal is a peripheral chip select output that selects the slave device to which
the current transmission is intended.
In slave mode, the CS0_x signal is a slave select input signal that allows an SPI master to select the DSPI
as the target for transmission. CS0_x must be configured as input and pulled high. If the internal pullup is
being used then the appropriate bits in the relevant SIU_PCR must be set (SIU_PCR [WPE = 1],
[WPS = 1]).
Set the IBE and OBE bits in the SIU_PCR for all CS0_x pins when the DSPI chip select or slave select
primary function is selected for that pin. When the pin is used for DSPI master mode as a chip select output,
set the OBE bit. When the pin is used in DSPI slave mode as a slave select input, set the IBE bit.
Table 23-1. Signal properties
Name I/O type
Function
Master mode Slave mode
CS0_x Output / input Peripheral chip select 0 Slave select
CS1:3_x Output Peripheral chip select 1–3 Unused
1
1
The SIUL allows you to select alternate pin functions for the device.
CS4_x Output Peripheral chip select 4 Master trigger
CS5_x Output Peripheral chip select 5 /
Peripheral chip select strobe
Unused
1
SIN_x Input Serial data in Serial data in
SOUT_x Output Serial data out Serial data out
SCK_x Output / input Serial clock (output) Serial clock (input)
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