MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 581
Figure 24-56. PIT block diagram
24.5.2 Features
The main features of this block are:
• Timers can generate interrupts
• All interrupts are maskable
• Independent timeout periods for each timer
24.5.3 Signal description
The PIT module has no external pins.
24.5.4 Memory map and register description
This section provides a detailed description of all registers accessible in the PIT module.
24.5.4.1 Memory map
Table 24-23 gives an overview of the PIT registers. See the chip memory map for the PIT base address.
Timer 5
Timer 0
.
.
.
PIT
Registers
Peripheral
interrupts
PIT
.
.
.
triggers
Bus
System Clock