Freescale Semiconductor MPC5604B - Memory Map

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 743
at address Y, accesses to address 0x2000+Y will be identical to accesses at address Y. Only for registers
implemented in area 1 and defined as protectable soft lock bits are available in area 4.
Area 4 is 1.5 KB and holds the soft lock bits, one bit per byte in area 1. The four soft lock bits associated
with a module register word are arranged at byte boundaries in the memory map. The soft lock bit registers
can be directly written using a bit mask.
Area 5 is 512 byte and holds the configuration bits of the protection mode. There is one configuration hard
lock bit per module that prevents all further modifications to the soft lock bits and can only be cleared by
a system reset once set. The other bits, if set, will allow user access to the protected module.
If any locked byte is accessed with a write transaction, a transfer error will be issued to the system and the
write transaction will not be executed. This is true even if not all accessed bytes are locked.
Accessing unimplemented 32-bit registers in Areas 4 and 5 results in a transfer error.
29.5.1 Memory map
Table 29-1 gives an overview on the Register Protection registers implemented.
NOTE
Reserved registers in area #2 will be handled according to the protected IP
(module under protection).
Table 29-1. Register protection memory map
Address offset Register Location
0x0000 Module Register 0 (MR0) on page 744
0x0001 Module Register 1 (MR1) on page 744
0x0002 Module Register 2 (MR2) on page 744
0x0003–0x17FF Module Register 3 (MR3) - Module Register 6143 (MR6143) on page 744
0x1800–0x1FFF
Reserved —
0x2000 Module Register 0 (MR0) + Set soft lock bit 0 (LMR0) on page 744
0x2001 Module Register 1 (MR1) + Set soft lock bit 1 (LMR1) on page 744
0x2002–0x37FF Module Register 2 (MR2) + Set soft lock bit 2 (LMR2) –
Module Register 6143 (MR6143) + Set soft lock bit 6143 (LMR6143)
on page 744
0x3800 Soft Lock Bit Register 0 (SLBR0): soft lock bits 0-3 on page 744
0x3801 Soft Lock Bit Register 1 (SLBR1): soft lock bits 4-7 on page 744
0x3802–0x3DFF Soft Lock Bit Register 2 (SLBR2): soft lock bits 8-11 –
Soft Lock Bit Register 1535 (SLBR1535): soft lock bits 6140-6143
on page 744
0x3E00–0x3FFB Reserved —
0x3FFC Global Configuration Register (GCR) on page 745