MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 649
In the following some nonvolatile registers are described. Please notice that such entities are not
Flip-Flops, but locations of TestFlash or Shadow sectors with a special meaning.
During the flash memory initialization phase, the FPEC reads these nonvolatile registers and updates the
corresponding volatile registers. When the FPEC detects ECC double errors in these special locations, it
behaves in the following way:
• In case of a failing system locations (configurations, device options, redundancy, embedded
firmware), the initialization phase is interrupted and a Fatal Error is flagged.
• In case of failing user locations (protections, censorship, platform flash memory controller, ...), the
volatile registers are filled with all ‘1’s and the flash memory initialization ends setting low the
PEG bit of the corresponding MCR (CFLASH_MCR or DFLASH_MCR).
27.5.1 CFlash register description
27.5.1.1 CFlash Module Configuration Register (CFLASH_MCR)
The CFlash Module Configuration Register is used to enable and monitor all modify operations of the flash
memory module.
0x0010 DFlash Low/Mid Address Space Block Select Register
(DFLASH_LMS)
on page 693
0x0014 Reserved —
0x0018 DFlash Address Register (DFLASH_ADR) on page 693
0x001C–0x0038 Reserved —
0x003C DFlash User Test 0 register (DFLASH_UT0) on page 694
0x0040 DFlash User Test 1 register (DFLASH_UT1) on page 697
0x0044 DFlash User Test 2 register (DFLASH_UT2) on page 697
0x0048 DFlash User Multiple Input Signature Register 0
(DFLASH_UMISR0)
on page 698
0x004C DFlash User Multiple Input Signature Register 1
(DFLASH_UMISR1)
on page 699
0x0050 DFlash User Multiple Input Signature Register 2
(DFLASH_UMISR2)
on page 700
0x0054 DFlash User Multiple Input Signature Register 3
(DFLASH_UMISR3)
on page 701
0x0058 DFlash User Multiple Input Signature Register 4
(DFLASH_UMISR4)
on page 702
Table 27-8. DFlash registers (continued)
Address offset Register name Location
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