MPC5604B/C Microcontroller Reference Manual, Rev. 8
694 Freescale Semiconductor
27.5.2.6 DFlash User Test 0 register (DFLASH_UT0)
The User Test Registers provide the user with the ability to test features on the flash memory module.
Address offset: 0x00018 Access: Read
0123456789101112131415
R
000000000AD22AD21AD20AD19AD18AD17AD16
W
Reset
0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 0 0 0
W
Reset
0000000000000000
Figure 27-29. DFlash Address Register (DFLASH_ADR)
Table 27-44. DFLASH_ADR field descriptions
Field Description
AD[22:3] ADdress 22-3
The Address Register provides the first failing address in the event of ECC error
(DFLASH_MCR[EER] set) or the first failing address in the event of RWW error
(DFLASH_MCR[RWE] set), or the address of a failure that may have occurred in a FPEC operation
(DFLASH_MCR[PEG] cleared). The Address Register also provides the first address at which an
ECC single error correction occurs (DFLASH_MCR[EDC] set), if the device is configured to show this
feature.
The ECC double error detection takes the highest priority, followed by the RWW error, the FPEC error
and the ECC single error correction. When accessed DFLASH_ADR will provide the address related
to the first event occurred with the highest priority. The priorities between these four possible events
is summarized in the Table 27-45.
This address is always a Double Word address that selects 64 bits.
In case of a simultaneous ECC Double Error Detection on both Double Words of the same page, bit
AD3 will output 0. The same is valid for a simultaneous ECC Single Error Correction on both Double
Words of the same page.
In User Mode the Address Register is read only.
Table 27-45. DFLASH_ADR content: priority list
Priority level Error flag DFLASH_ADR content
1 DFLASH_MCR[EER] = 1 Address of first ECC Double Error
2 DFLASH_MCR[RWE] = 1 Address of first RWW Error
3 DFLASH_MCR[PEG] = 0 Address of first FPEC Error
4 DFLASH_MCR[EDC] = 1 Address of first ECC Single Error Correction
To Next Page
Loading...
