Freescale Semiconductor MPC5604B - B.5 Changes between Revisions 1 and 2

MPC5604B/C Microcontroller Reference Manual, Rev. 8
920 Freescale Semiconductor
B.5 Changes between revisions 1 and 2
Table B-5. Changes between revisions 1 and 2
Chapter Description
Throughout Editorial changes and improvements.
Harmonized the name of the 4 different clock source with the name listened here:
- FXOSC or fast external crystal oscillator 4-16 MHz
- FIRC or fast internal RC oscillator 16 MHz
- SIRC or slow internal RC oscillator 128 KHz
- SXOSC or slow external crystal oscillator 32 KHz
- FMPLL or frequency modulated phase locked loop
- Harmonized the cross reference to sections.
- Replaced every “Miscellaneous Control Module” or “MCM“ occurrences respectively with
“Error Correction Status Module“ or “(ECSM)“.
Cover page Replaced RPN: from “MPC5602x, MPC5603x,MPC5604x” to “MPC5602Bx, MPC5603Bx,
MPC5604Bx, MPC5602Cx, MPC5603Cx, MPC5604Cx“.
Overview - Section 1.1, “Introduction”: replaced with a new one.
- Ta bl e 2 : Added rows, extended the SRAM memory to 48 KB.
- Ta bl e 4 : removed the cell of “AP“.
Signal Description - Section 2.2, “Package pinouts”: updated all pin map.
- Section 2.3, “Pad configuration during reset phases” and Section 2.6, “System pins”:
Updated because After power-up phase the majority of pins is in tristate end not inpu waek
pull-up.
- Ta bl e 7 :
- PC[1] type changed from “F“ to “M“.
- footnote 9: included also PH[9:10] among the exepted pins.
- Section 2.5, “Pad types”: Changed the Note .
Clock Description - Removed the reference to normal end test access, all accesses are seen as supervisor.
- Ta bl e 1 0: Replaced PIT_RIT with PIT.
- Ta bl e 1 5:
- Replaced “ENABLE“ heading rows with “ME_GS.S_XOSC“.
- Replaced “BYP“ heading rows with “OSC_CTL.OSCBYOP“.
- Replaced “Hiz‘ with “High Z“.
- Ta bl e 1 8:
- Replaced “ENABLE“ heading rows with “OSC_CTL.S_OSC“.
- Replaced “BYP“ heading rows with “OSC_CTL.OSCBYOP“.
- Replaced “Hiz‘ with “High Z“.
- Ta bl e 3 9: Removed FLCI_A field.
- Figure 14: Removed MODE and DIV4 path.
- Section 3.3, “Clock Generation Module (MC_CGM)”: Replaced with a new section.
Mode Entry Module Replaced the entire chapter.
Boot Assist Module - Aligned naming of LINFlex module.
- Section 8.3.4.3, “BAM resources”: Removed any references to STM, CMU and FMPLL.
Reset Generation
Module
Replaced the entire chapter.