Freescale Semiconductor MPC5604B - Low Frequency Reference Register FMPLL (CMU_LFREFR); Interrupt Status Register (CMU_ISR)

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 117
6.8.5.4 Low Frequency Reference Register FMPLL (CMU_LFREFR)
6.8.5.5 Interrupt Status Register (CMU_ISR)
Offset: 0x0C Access: Read/write
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0000
LFREF
W
Reset0000000000000000
Figure 6-15. Low Frequency Reference Register FMPLL (CMU_LFREFR)
Table 6-20. CMU_LFREFR field descriptions
Field Description
LFREF Low Frequency reference value.
This field determines the low reference value for the FMPLL. The reference value is given by:
(LFREF  16) × (f
FIRC
 4).
Offset: 0x10 Access: Read/write
0123456789101112131415
R00000000 00000 000
W
Reset0000000000000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0000000
0 00000
FHHI
FLLI
OLRI
W w1c w1c w1c
Reset0000000000000000
Figure 6-16. Interrupt status register (CMU_ISR)
Table 6-21. CMU_ISR field descriptions
Field Description
FHHI FMPLL clock frequency higher than high reference interrupt.
This bit is set by hardware when f
FMPLL_clk
becomes higher than HFREF value and FMPLL_clk is ‘ON’
as signalled by the MC_ME. It can be cleared by software by writing ‘1’.
0 No FHH event.
1 FHH event is pending.