MPC5604B/C Microcontroller Reference Manual, Rev. 8
832 Freescale Semiconductor
Wakeup/Interrupt Falling-Edge Event Enable Register WKPU_WIFEER 32-bit Base + 0x002C
Wakeup/Interrupt Filter Enable Register WKPU_WIFER 32-bit Base + 0x0030
Wakeup/Interrupt Pullup Enable Register WKPU_WIPUER 32-bit Base + 0x0034
Reserved — — (Base + 0x0038) –
(Base + 0xFFFF)
eMIOS_0 0xC3FA_0000
EMIOS Module Configuration Register EMIOS0_MCR 32-bit Base + 0x0000
EMIOS Global FLAG Register EMIOS0_GFLAG 32-bit Base + 0x0004
EMIOS Output Update Disable Register EMIOS0_OUDIS 32-bit Base + 0x0008
EMIOS Disable Channel Register EMIOS0_UCDIS 32-bit Base + 0x000C
Reserved — — (Base + 0x0010) –
(Base + 0x001F)
eMIOS_0 UC0 A Register EMIOS0_UC0_A 32-bit Base + 0x0020
eMIOS_0 UC0 B Register EMIOS0_UC0_B 32-bit Base + 0x0024
eMIOS_0 UC0 CNT EMIOS0_UC0_CNT 32-bit Base + 0x0028
eMIOS_0 UC0 Control Register EMIOS0_UC0_SC 32-bit Base + 0x002C
eMIOS_0 UC0 Status Register EMIOS0_UC0_SS 32-bit Base + 0x0030
Reserved — — Base + 0x0034 –
Base + 0x003F
eMIOS_0 UC1 A Register EMIOS0_UC1_A 32-bit Base + 0x0040
eMIOS_0 UC1 B Register EMIOS0_UC1_B 32-bit Base + 0x0044
Reserved — — Base + 0x0048 -–
Base + 0x004B
eMIOS_0 UC1 Control Register EMIOS0_UC1_SC 32-bit Base + 0x004C
eMIOS_0 UC1 Status Register EMIOS0_UC1_SS 32-bit Base + 0x0050
Reserved — — Base + 0x0054 –
Base + 0x005F
eMIOS_0 UC2 A Register EMIOS0_UC2_A 32-bit Base + 0x0060
eMIOS_0 UC2 B Register EMIOS0_UC2_B 32-bit Base + 0x0064
Reserved — — Base + 0x0068 –
Base + 0x006B
eMIOS_0 UC2 Control Register EMIOS0_UC2_SC 32-bit Base + 0x006C
eMIOS_0 UC2 Status Register EMIOS0_UC2_SS 32-bit Base + 0x0070
Reserved — — Base + 0x0074 –
Base + 0x007F
Table A-2. Detailed register map (continued)
Register description Register name
Used
size
Address