MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 687
27.5.2.2.1 DFlash Nonvolatile Low/Mid Address Space Block Locking Register
(DFLASH_NVLML)
The DFLASH_LML register has a related Nonvolatile Low/Mid Address Space Block Locking register
located in TestFlash that contains the default reset value for DFLASH_LML. During the reset phase of the
flash memory module, the DFLASH_NVLML register content is read and loaded into the
DFLASH_LML.
The DFLASH_NVLML register is a 64-bit register, of which the 32 most significant bits 63:32 are ‘don’t
care’ and are used to manage ECC codes.
Offset: 0xC03DE8 Access: Read/write
0123456789101112131415
R
LME1111111111
TSLK
1111
W
Reset1111111111111111
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
111111111111
LLK
W
Reset1111111111111111
Figure 27-25. DFlash Nonvolatile Low/Mid address space block Locking register (DFLASH_NVLML)
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