MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 689
27.5.2.3 DFlash Secondary Low/Mid Address Space Block Locking Register
(DFLASH_SLL)
The DFlash Secondary Low/Mid Address Space Block Locking Register provides an alternative means to
protect blocks from being modified. These bits, along with bits in the DFLASH_LML register, determine
if the block is locked from Program or Erase. An “OR” of DFLASH_LML and DFLASH_SLL determine
the final lock status.
Offset: 0x000C Access: Read/write
0123456789101112131415
R
SLE0000000000
STSLK
0000
W
Reset Defined by DFLASH_NVSLL at DFlash Test Sector Address 0xC03DF8. This location is user OTP (One
Time Programmable). The DFLASH_NVSLL register influences only the R/W bits of the DFLASH_SLL
register.
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
000000000000
SLK
W
Reset Defined by DFLASH_NVSLL at DFlash Test Sector Address 0xC03DF8. This location is user OTP (One
Time Programmable). The DFLASH_NVSLL register influences only the R/W bits of the DFLASH_SLL
register.
Figure 27-26. DFlash Secondary Low/mid address space block Locking register (DFLASH_SLL)
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