Contents RM0090
11/1422 Doc ID 018909 Rev 4
12.3.6 DAC trigger selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
12.3.7 DMA request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
12.3.8 Noise generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
12.3.9 Triangle-wave generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
12.4 Dual DAC channel conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
12.4.1 Independent trigger without wave generation . . . . . . . . . . . . . . . . . . . 317
12.4.2 Independent trigger with single LFSR generation . . . . . . . . . . . . . . . . 318
12.4.3 Independent trigger with different LFSR generation . . . . . . . . . . . . . . 318
12.4.4 Independent trigger with single triangle generation . . . . . . . . . . . . . . . 318
12.4.5 Independent trigger with different triangle generation . . . . . . . . . . . . . 319
12.4.6 Simultaneous software start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
12.4.7 Simultaneous trigger without wave generation . . . . . . . . . . . . . . . . . . 319
12.4.8 Simultaneous trigger with single LFSR generation . . . . . . . . . . . . . . . 320
12.4.9 Simultaneous trigger with different LFSR generation . . . . . . . . . . . . . 320
12.4.10 Simultaneous trigger with single triangle generation . . . . . . . . . . . . . . 320
12.4.11 Simultaneous trigger with different triangle generation . . . . . . . . . . . . 321
12.5 DAC registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
12.5.1 DAC control register (DAC_CR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
12.5.2 DAC software trigger register (DAC_SWTRIGR) . . . . . . . . . . . . . . . . . 324
12.5.3 DAC channel1 12-bit right-aligned data holding register
(DAC_DHR12R1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324
12.5.4 DAC channel1 12-bit left aligned data holding register
(DAC_DHR12L1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
12.5.5 DAC channel1 8-bit right aligned data holding register
(DAC_DHR8R1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
12.5.6 DAC channel2 12-bit right aligned data holding register
(DAC_DHR12R2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
12.5.7 DAC channel2 12-bit left aligned data holding register
(DAC_DHR12L2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
12.5.8 DAC channel2 8-bit right-aligned data holding register
(DAC_DHR8R2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
12.5.9 Dual DAC 12-bit right-aligned data holding register
(DAC_DHR12RD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326
12.5.10 DUAL DAC 12-bit left aligned data holding register
(DAC_DHR12LD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
12.5.11 DUAL DAC 8-bit right aligned data holding register
(DAC_DHR8RD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
12.5.12 DAC channel1 data output register (DAC_DOR1) . . . . . . . . . . . . . . . . 328
12.5.13 DAC channel2 data output register (DAC_DOR2) . . . . . . . . . . . . . . . . 328
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