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ST STM32F40 Series User Manual

ST STM32F40 Series
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USB on-the-go high-speed (OTG_HS) RM0090
1167/1422 Doc ID 018909 Rev 4
Endpoint transfer
The device endpoint-x transfer size registers (DIEPTSIZx/DOEPTSIZx) allow the application
to program the transfer size parameters and read the transfer status.
The programming operation must be performed before setting the endpoint enable bit in the
endpoint control register.
Once the endpoint is enabled, these fields are read-only as the OTG FS core updates them
with the current transfer status.
The following transfer parameters can be programmed:
Transfer size in bytes
Number of packets constituting the overall transfer size.
Endpoint status/interrupt
The device endpoint-x interrupt registers (DIEPINTx/DOPEPINTx) indicate the status of an
endpoint with respect to USB- and AHB-related events. The application must read these
registers when the OUT endpoint interrupt bit or the IN endpoint interrupt bit in the core
interrupt register (OEPINT bit in OTG_HS_GINTSTS or IEPINT bit in OTG_HS_GINTSTS,
respectively) is set. Before the application can read these registers, it must first read the
device all endpoints interrupt register (OTG_HS_DAINT) to get the exact endpoint number
for the device endpoint-x interrupt register. The application must clear the appropriate bit in
this register to clear the corresponding bits in the DAINT and GINTSTS registers.
The peripheral core provides the following status checks and interrupt generation:
Transfer completed interrupt, indicating that data transfer has completed on both the
application (AHB) and USB sides
Setup stage done (control-out only)
Associated transmit FIFO is half or completely empty (in endpoints)
NAK acknowledge transmitted to the host (isochronous-in only)
IN token received when Tx-FIFO was empty (bulk-in/interrupt-in only)
OUT token received when endpoint was not yet enabled
Babble error condition detected
Endpoint disable by application is effective
Endpoint NAK by application is effective (isochronous-in only)
More than 3 back-to-back setup packets received (control-out only)
Timeout condition detected (control-in only)
Isochronous out packet dropped without generating an interrupt

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ST STM32F40 Series Specifications

General IconGeneral
BrandST
ModelSTM32F40 Series
CategoryMicrocontrollers
LanguageEnglish

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