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ST STM32F40 Series User Manual

ST STM32F40 Series
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RM0090 USB on-the-go high-speed (OTG_HS)
Doc ID 018909 Rev 4 1280/1422
OTG_HS_HCTSIZ2 = 0, reinitialize the channel for the next transfer. This time, the
application must reset the ODDFRM bit in OTG_HS_HCCHAR2.
Isochronous OUT transactions
A typical isochronous OUT operation in Slave mode is shown in Figure 393. The
assumptions are:
The application is attempting to send one packet every frame (up to 1 maximum
packet size), starting with an odd frame. (transfer size = 1 024 bytes).
The periodic transmit FIFO can hold one packet (1 KB).
Periodic request queue depth = 4.
The sequence of operations is as follows:
a) Initialize and enable channel 1. The application must set the ODDFRM bit in
OTG_HS_HCCHAR1.
b) Write the first packet for channel 1. For a high-bandwidth isochronous transfer, the
application must write the subsequent packets up to MCNT (maximum number of
packets to be transmitted in the next frame times before switching to another
channel.
c) Along with the last DWORD write of each packet, the OTG_HS host writes an
entry to the periodic request queue.
d) The OTG_HS host attempts to send the OUT token in the next frame (odd).
e) The OTG_HS host generates the XFRC interrupt as soon as the last packet is
transmitted successfully.
f) In response to the XFRC interrupt, reinitialize the channel for the next transfer.
g) Handling nonACK responses

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ST STM32F40 Series Specifications

General IconGeneral
BrandST
ModelSTM32F40 Series
CategoryMicrocontrollers
LanguageEnglish

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