Freescale Semiconductor MPC5604B - Chapter 2 SIUL: System Integration Unit Line; 1. Introduction; 2. Pad configuration

MPC5604B/C Microcontroller Reference Manual, Rev. 8
4 Freescale Semiconductor
5.1.3 Censorship ......................................................................................................................66
5.2 Boot Assist Module (BAM) ............................................................................................................71
5.2.1 BAM software flow ........................................................................................................71
5.2.2 LINFlex (RS232) boot ....................................................................................................79
5.2.3 FlexCAN boot ................................................................................................................80
5.3 System Status and Configuration Module (SSCM) ........................................................................82
5.3.1 Introduction ....................................................................................................................82
5.3.2 Features ...........................................................................................................................82
5.3.3 Modes of operation .........................................................................................................83
5.3.4 Memory map and register description ............................................................................83
Chapter 6
Clock Description
6.1 Clock architecture ...........................................................................................................................93
6.2 Clock gating ....................................................................................................................................94
6.3 Fast external crystal oscillator (FXOSC) digital interface ..............................................................95
6.3.1 Main features ..................................................................................................................95
6.3.2 Functional description ....................................................................................................95
6.3.3 Register description ........................................................................................................96
6.4 Slow external crystal oscillator (SXOSC) digital interface ............................................................97
6.4.1 Introduction ....................................................................................................................97
6.4.2 Main features ..................................................................................................................97
6.4.3 Functional description ....................................................................................................97
6.4.4 Register description ........................................................................................................98
6.5 Slow internal RC oscillator (SIRC) digital interface ......................................................................99
6.5.1 Introduction ....................................................................................................................99
6.5.2 Functional description ....................................................................................................99
6.5.3 Register description ......................................................................................................100
6.6 Fast internal RC oscillator (FIRC) digital interface ......................................................................101
6.6.1 Introduction ..................................................................................................................101
6.6.2 Functional description ..................................................................................................101
6.6.3 Register description ......................................................................................................102
6.7 Frequency-modulated phase-locked loop (FMPLL) .....................................................................102
6.7.1 Introduction ..................................................................................................................102
6.7.2 Overview ......................................................................................................................102
6.7.3 Features .........................................................................................................................103
6.7.4 Memory map ................................................................................................................103
6.7.5 Register description ......................................................................................................104
6.7.6 Functional description ..................................................................................................107
6.7.7 Recommendations ........................................................................................................110
6.8 Clock monitor unit (CMU) ............................................................................................................110
6.8.1 Introduction ..................................................................................................................110
6.8.2 Main features ................................................................................................................111
6.8.3 Block diagram ..............................................................................................................111
6.8.4 Functional description ..................................................................................................112