Freescale Semiconductor MPC5604B - Page 16

MPC5604B/C Microcontroller Reference Manual, Rev. 8
Freescale Semiconductor 5
6.8.5 Memory map and register description ..........................................................................114
Chapter 7
Clock Generation Module (MC_CGM)
7.1 Overview .......................................................................................................................................119
7.2 Features .........................................................................................................................................120
7.3 Modes of Operation .......................................................................................................................121
7.3.1 Normal and Reset Modes of Operation ........................................................................121
7.4 External Signal Description ..........................................................................................................121
7.5 Memory Map and Register Definition ..........................................................................................121
7.5.1 Register Descriptions ....................................................................................................125
7.6 Functional Description ..................................................................................................................129
7.6.1 System Clock Generation .............................................................................................129
7.6.2 Output Clock Multiplexing ...........................................................................................130
7.6.3 Output Clock Division Selection ..................................................................................131
Chapter 8
Mode Entry Module (MC_ME)
8.1 Introduction ...................................................................................................................................133
8.1.1 Overview ......................................................................................................................133
8.1.2 Features .........................................................................................................................135
8.1.3 Modes of Operation ......................................................................................................135
8.2 External Signal Description ..........................................................................................................136
8.3 Memory Map and Register Definition ..........................................................................................136
8.3.1 Register Description .....................................................................................................144
8.4 Functional Description ..................................................................................................................166
8.4.1 Mode Transition Request ..............................................................................................166
8.4.2 Modes Details ...............................................................................................................167
8.4.3 Mode Transition Process ..............................................................................................172
8.4.4 Protection of Mode Configuration Registers ................................................................182
8.4.5 Mode Transition Interrupts ...........................................................................................182
8.4.6 Peripheral Clock Gating ...............................................................................................184
8.4.7 Application Example ....................................................................................................185
Chapter 9
Reset Generation Module (MC_RGM)
9.1 Introduction ...................................................................................................................................187
9.1.1 Overview ......................................................................................................................187
9.1.2 Features .........................................................................................................................188
9.1.3 Modes of operation .......................................................................................................189
9.2 External signal description ............................................................................................................190
9.3 Memory map and register definition .............................................................................................190
9.3.1 Register descriptions ....................................................................................................192
9.4 Functional Description ..................................................................................................................203
9.4.1 Reset State Machine .....................................................................................................203